ATMEGA169P-16MCHR【PDF 11/274 页】MCU AVR 16KB FLASH 16MHZ 64-VQFN

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108

8018P–AVR–08/10

ATmega169P

put Compare Units” on page 115. The compare match event will also set the Compare Match

Flag (OCF1A/B) which can be used to generate an Output Compare interrupt request.

The Input Capture Register can capture the Timer/Counter value at a given external (edge trig-

gered) event on either the Input Capture pin (ICP1) or on the Analog Comparator pins (See ”AC

- Analog Comparator” on page 212.) The Input Capture unit includes a digital filtering unit (Noise

Canceler) for reducing the chance of capturing noise spikes.

The TOP value, or maximum Timer/Counter value, can in some modes of operation be defined

by either the OCR1A Register, the ICR1 Register, or by a set of fixed values. When using

OCR1A as TOP value in a PWM mode, the OCR1A Register can not be used for generating a

PWM output. However, the TOP value will in this case be double buffered allowing the TOP

value to be changed in run time. If a fixed TOP value is required, the ICR1 Register can be used

as an alternative, freeing the OCR1A to be used as PWM output.

15.2.2

Definitions

The following definitions are used extensively throughout the section:

15.2.3

Compatibility

The 16-bit Timer/Counter has been updated and improved from previous versions of the 16-bit

AVR Timer/Counter. This 16-bit Timer/Counter is fully compatible with the earlier version

regarding:

All 16-bit Timer/Counter related I/O Register address locations, including Timer Interrupt

Registers.

Bit locations inside all 16-bit Timer/Counter Registers, including Timer Interrupt Registers.

Interrupt Vectors.

The following control bits have changed name, but have same functionality and register location:

PWM10 is changed to WGM10.

PWM11 is changed to WGM11.

CTC1 is changed to WGM12.

The following bits are added to the 16-bit Timer/Counter Control Registers:

FOC1A and FOC1B are added to TCCR1C.

WGM13 is added to TCCR1B.

The 16-bit Timer/Counter has improvements that will affect the compatibility in some special

cases.

BOTTOM

The counter reaches the BOTTOM when it becomes 0x0000.

MAX

The counter reaches its MAXimum when it becomes 0xFFFF (decimal 65535).

TOP

The counter reaches the TOP when it becomes equal to the highest value in the count

sequence. The TOP value can be assigned to be one of the fixed values: 0x00FF, 0x01FF,

or 0x03FF, or to the value stored in the OCR1A or ICR1 Register. The assignment is

dependent of the mode of operation.

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